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| The new QorIQ AMP SoC is a 28nm, 64-bit multicore, multithreaded design. (source Freescale) |
Freescale Semiconductor has unveiled details of the company's next-generation QorIQ multicore processor platform today, at the Freescale Technology Forum in San Antonio. The AMP (Advanced Multiprocessing) series, which Freescale plans to manufacture in a 28-nm process, will incorporate a new, multithreaded 64-bit Power Architecture® core, with support for 2-24 virtual cores, combined with acceleration engines and sophisticated power management.
Freescale says that the AMP series will deliver up to 4x the performance of the previous generation's eight-core QorIQ P4080 device. The company is planning to offer the AMP series in a broad array of configurations (T1 to T5), from ultra-low-power single-core products up to highly advanced SoCs targeting applications in networking, robotics, storage, medical, video systems and military/aerospace.
New multithreaded e6500 core with AltiVec technology
Freescale based the QorIQ AMP series on a new multithreaded, 64-bit Power Architecture e6500 core that operates at up to a 2.5GHz clock rate. The e6500 incorporates an enhanced version of the AltiVec vector processor, a 128b SIMD (single-instruction multiple data) unit that operates independently of the scalar processor and FPU (floating point unit). Freescale uses the AltiVec technology to address high-bandwidth data processing and algorithmic-intensive computations. (See Freescale's video introduction to the e6500 here).
CoreNet interconnect fabric
The CoreNet coherency fabric provides designers with a high-bandwidth fabric that can scale with clusters of multicore processors. CoreNet is designed to support data communications with emerging and future DDR (double data rate) memories that will exceed the current 1600 MHz standards.
CoreNet interconnect fabric
The CoreNet coherency fabric provides designers with a high-bandwidth fabric that can scale with clusters of multicore processors. CoreNet is designed to support data communications with emerging and future DDR (double data rate) memories that will exceed the current 1600 MHz standards.
Acceleration technologies
Freescale has added a variety of acceleration engines and co-processing technologies to complement the e6500 cores. Accelerators in the AMP SoCs include units for security, pattern matching, decompress/compress engines, and Freescale's DPAA (data path acceleration) technology.
The DPAA eliminates bottlenecks in communications from the cores to I/O (input-output) and cores to network accelerators, which Freescale says is especially critical in 10Gigabit networking.
The SEC (security acceleration engine) is a 5th generation upgrade from the P4080, which designers can use to offload protocol processing. The SEC enables execution of a number of encryption algorithms, including the ZUC algorithm for 4G (fourth generation) LTE (long-term evolution), IPSec (IP Security Protocol Working Group), and SSL (secure socket layer), at up to 40 Gbps. Freescale rates the SEC at up to 140 Gbps of crypto hardware acceleration for current and emerging wireless and wireline algorithms.
Engineers can use the QorIQ AMP pattern matching engine along with software to accelerate detection of virus signatures, or to perform network policy enforcement. You can store PCRE (Perl-compatible regular expressions) in the pattern matching engine's internal cache to define signatures in packets that you want to identify.
DCE 1.0 is a new decompress/compress engine in the AMP, which provides for execution of lossless compression algorithms, including the raw DEFLATE algorithm (RFC1951), GZIP format (RFC1952) and ZLIB format (RFC1950), as well as Base64 encoding and decoding (RFC4648).
The AMP design also incorporates acceleration/offload technologies for 128-bit SIMD data prefetching, in-line parsing and classification, and quality of service functions.
The DPAA eliminates bottlenecks in communications from the cores to I/O (input-output) and cores to network accelerators, which Freescale says is especially critical in 10Gigabit networking.
The SEC (security acceleration engine) is a 5th generation upgrade from the P4080, which designers can use to offload protocol processing. The SEC enables execution of a number of encryption algorithms, including the ZUC algorithm for 4G (fourth generation) LTE (long-term evolution), IPSec (IP Security Protocol Working Group), and SSL (secure socket layer), at up to 40 Gbps. Freescale rates the SEC at up to 140 Gbps of crypto hardware acceleration for current and emerging wireless and wireline algorithms.
Engineers can use the QorIQ AMP pattern matching engine along with software to accelerate detection of virus signatures, or to perform network policy enforcement. You can store PCRE (Perl-compatible regular expressions) in the pattern matching engine's internal cache to define signatures in packets that you want to identify.
DCE 1.0 is a new decompress/compress engine in the AMP, which provides for execution of lossless compression algorithms, including the raw DEFLATE algorithm (RFC1951), GZIP format (RFC1952) and ZLIB format (RFC1950), as well as Base64 encoding and decoding (RFC4648).
The AMP design also incorporates acceleration/offload technologies for 128-bit SIMD data prefetching, in-line parsing and classification, and quality of service functions.
Advanced power management system
The AMP series products will utilize a variable-mode power switch that will allow customers to precisely modulate the power of the cores and other processing units independently. Freescale says that the new power management scheme, and the move to a 28 nm process technology, reduces power consumption by up to 50 percent. Developers can control individual core frequencies and use six core power management states.
AMP product tiers
Freescale is planning to offer the AMP series in three levels of products:
- Control plane processors (service provider routers, storage networks), with up to 6 cores running at up to 2.5 GHz, and greater than 6 MB of L2 cache.
- High-end data plane processors (routers, switches, access gateways, mil/aero applications),with up to 24 virtual cores running at up to 2.0 GHz, 50 Gbps IP forwarding capability, and advanced application acceleration.
- Low-end data plane processors (media gateways, network attached storage, integrated services router), with up to 8 virtual cores running up to 1.6 GHz, advanced application acceleration, and less than 10W power dissipation.
The first product which Freescale will introduce in the QorIQ AMP series is the T4240, which integrates hardware accelerators with 12 dual-threaded e6500 cores, providing 24 threads to address high-end data plane processing applications. Freescale is targeting application for the T4240 in metro carrier edge routers, access gateways and aerospace/defense products. The company says that they will provide more details regarding the T4240 this year, and they are planning for initial availability in early 2012.
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