Broadcom claims first 28nm communications processor with new XLP 200


Broadcom has introduced a new line of multicore communications processors, developed through their $3.7 billion acquisition of Netlogic Microsystems, which was completed in February this year. The company is seeking to leverage that investment to increase their penetration in what is, by their estimate, a $3 billion market that includes applications such as enterprise, service provider 4G/LTE, data center cloud computing, and software defined networking (SDN). Broadcom claims that the XLP 200-Series represents the first family of communications processors to be manufactured in a 28nm CMOS technology.

Chris O'Reilly, Senior Director of Product Marketing for the Processor and Wireless Infrastructure Group at Broadcom, says that the integration of Netlogic into Broadcom filled gaps in the company's portfolio, particularly for embedded and knowledge-based processors,  and remote radio head communications.  The new XLP 200 products will succeed the Netlogic/Broadcom XLP series of 40nm processors, which included the 32-nxCPU (Netlogic's multi-threaded architecture, 4 threads per coreXLP-832 and 64-nxCPU XLP-864 that Netlogic announced last year. At the Linley Tech Processor exactly one year ago, Dilip Ramachandran - Sr. Director of Multi-Core Processor Solutions at Netlogic, gave a preview of their 28nm roadmap, and introduced an 8-core/32-nxCPU 28nm XLP332E for wireless base stations.

Netlogic introduced the 28nm 32-nxCPU XLP332E communications processor for wireless
base stations at the 2011 Linley Tech Processor Conference in San Jose, CA (10/5/11)

O'Reilly says that Broadcom will first introduce a single-core (4 nxCPU) and dual-core (8 nxCPU) version of the XLP 200, but the architecture is scalable up to 640 nxCPUs. The combination of advanced process and architecture give the XLP 200 the ability to achieve either up to a 400% performance increase, or a 60% power savings, compared to benchmarks of some competitor's 65nm devices, according to O'Reilly. By integrating a Grammar Processing Engine and Regular Expression (RegEx) engine with a Deep Packet Inspection (DPI) engine, he says that the XLP 200 improves both accuracy and efficiency of packet processing. The Grammar Processing Engine parses the various protocols, fields and data positions, to process packets in real time. Parsed content is then assigned to the RegEx engine, which forms the search database. O'Reilly says that by implementing regular expression representation of critical packet signatures, the XLP 200 can enable customers to shrink their database in a smaller amount of memory, which can be integrated on-chip.

Broadcom applies their own architectural enhancements to 64-bit MIPS cores, to implement the quad-issue, quad-threading, superscalar out-of-order execution processors, which can operate at up to a 2.0 GHz clock rate. Customers can make tradeoffs between power and performance with the XLP 200, depending on their application. Some customers have software which was written assuming a single-core CPU, and to maximize performance they can run their code on the XLP 200 at the maximum clock rate, says O'Reilly, rather than re-write their code. For security, the XLP 200 family also integrates a number of hardware accelerators for encryption/decryption and authentication, which "satisfy 99.5% of the encryption requirements that customers have".

Broadcom is sampling the XLP 200 series now, and is targeting production volume for 2H 2013. The company says that multiple device options and configurations are available.

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Contact Mike Demler at mike.demler@EEdailynews.com
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