Mindspeed is touting their history of building ARM processor core based SoCs, with the announcement of their new line of 40nm Comcerto 2000 communications processors. Preetinder (Preet) Virk, Senior VP and GM for the Communications Convergence Processing (CCP) business unit at Mindspeed, says that ARM's technology and roadmap shows that the IP provider is able to meet or exceed performance from competitors, such as Power Architecture and MIPS. Virk attributed advantages to their ARM core architecture in higher core frequency, support for both Symmetrical Multiprocessing (SMP) and Asymmetrical Multiprocessing (AMP), lower power, and lower cost. While not disclosing details, Virk said that the cost will be "disruptive" compared to other single and dual core network communications processors. Virk recently rejoined Mindspeed from Freescale, where the 64-bit e6500 Power Architecture core is used in products such as the QorIQ base stations on a chip, and the 32-bit e500 Power Architecture is employed in the PowerQUICC Communications Processors.
Virk says that Mindspeed migrated to Cortex A9 from ARM-11 cores in their previous generation Comcerto 1000 products, but developed their "chassis" to be core agnostic, to ease migration to other cores in the future. Mindspeed describes the Comcerto 2000 as a "Application and Content-Aware Communications Processor", targeting enterprise applications such as integrated services routers, combining features for voice, data and security processing. Single (C2100) or dual (C2200) Cortex A9 cores, operating at up to 1.2 GHz, handle applications and services, while most networking tasks in Comcerto 2000 are offloaded to Mindspeed's proprietary accelerators.
Mindspeed's IP is contained in their Open Packet Accelerator Logic (OPAL), which Virk said is designed to support Software Defined Networking (SDN). The accelerators separate the data path from control and management functions, and are C-programmable through an API that Mindspeed provides. Virk says that this provides customers with the freedom to not be locked into a proprietary data processing scheme, and they can modify the architecture through software control, to apply their own algorithms for forwarding and Quality of Service (QoS), for example.
The Comcerto 2000 provides interfaces for enterprise digital telephony applications, including Digital Enhanced Cordless Telecommunications (DECT), and Subscriber Line Interface Controller/Subscriber Line Access Controller (SLIC/SLAC).Virk says that Comcert 2000 can process 16 channels of carrier-class Voice Over Internet Protocol (VOIP), in parallel with its data processing capabilities.
For security, Mindspeed has integrated a 8Kb One Time Programmable (OTP) memory in Comcerto, which allows users to burn in their own keys for functions such as Digital Rights Management (DRM). Comcerto also incorporates ARM's Trust Zone, support for secure boot, and blocking of the Joint Test Action Group (JTAG) port. OPAL accelerators include engines for IPv6 packet forwarding and Network Address Translation (NAT), firewall and Virtual Private Networks (VPN), Internet Protocol Security (IPsec) and Secure Sockets Layer (SSL) protocols, Deep Packet Inspection (DPI), QoS and storage network processing.
By offloading the Cortex A9 processors for operations such as IPv6 NAT and firewall applications, Virk says that service providers can fully utilize the ARM cores to run value-added applications. The large number of General Purpose Input/Outputs (GPIOs) can lower Bill of Materials (BOM) cost for manufactures, by replacing functions that may otherwise require a separate Programmable Logic Device (PLD).
Mindspeed is providing engineering samples of the C2200 dual-core and the C2100 single-core SoCs to lead customers now, along with Carrier-grade software and a Linux Software Develop Kit (SDK). The company is targeting availability of production samples in October, with volume production in December. An Evaluation Module (EVM) is sold out, but Mindspeed is planning gneral availability in July.