Monday, October 29, 2012

AMD-SeaMicro plugs ARM into "Ambidextrous" Strategy

At a press conference in San Francisco today, AMD announced that it will add ARM's 64-bit A-15 core architecture to their Opteron processors for data center servers and cloud computing, while continuing to design x86-based CPUs. The move fills in some of the missing pieces in AMD's "ambidextrous" strategy, which the company announced at its annual Financial Analyst Day in February. In the earlier announcement, AMD said that their strategy was to bring "Agile Delivery of Industry-Leading IP to the Market", by adopting an SoC-centric roadmap.

By aligning with ARM, AMD said they will be a "disruptive force" in the server market that is currently dominated by Intel. The company is targeting 2014 for first production availability of Opteron processors based on the ARM core architecture. During their press conference, AMD repeatedly pointed to the SeaMicro Freedom fabric technology as their key differentiator. AMD acquired SeaMicro on February 29, citing the opportunity to take advantage of "an inflection point in the industry driving opportunities in low power, client mobility, emerging markets and the cloud/megadata centers."

In her presentation during the ARM announcement, AMD's Senior Vice President and General Manager Dr. Lisa Su (formerly of Freescale), pointed out that ARM CPUs have many advantages but also some tradeoffs, saying that "ARM CPUs cannot fill network links as well as large CPUs do". AMD claims that the SeaMicro fabric solves this problem, by allowing clusters of CPUs to be connected together while providing a more efficient network interface. SeaMicro has previously implemented their fabric as a standalone ASIC, with multiple Freedom ASICs combined to provide a 1.28 terabits per-second interface linking low-power motherboards. AMD will embed the fabric in their SoCs with both x86 and ARM cores. The Freedom fabric is core Instruction Set Architecture (ISA) agnostic, and supports Ethernet as well as storage traffic.

ARM's CCN-504 System IP provides up to one terabit of cache coherent network
interconnect for up to 16 ARM Cortex A15 processor cores.

ARM has also been working with partners LSI and Calxeda, to develop a cache coherent, terabit bandwidth,  "System IP" interconnect fabric for multicore 64-bit Cortex-A15 architectures, the CoreLink CCN-504 network technology. Simon Segars, EVP and General Manager for the Processor and Physical IP Divisions at ARM, explained that the CoreLink fabric and the SeaMicro fabric are designed for very different purposes. CoreLink provides cache memory coherency for heterogeneous processor cores, while SeaMicro Freedom is focused on multicore system interfaces to Ethernet and storage networks. The two "fabrics" will work together in multicore server architectures. AMD and ARM, along with Imagination Technologies, MediaTek, and Texas Instruments, are founding members of the Heterogeneous System Architecture) Foundation (HSA), established in June of this year, to develop open standard hardware specifications for heterogeneous multicore processors.

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