Wednesday, June 15, 2011

#48DAC Reports: Freescale on Megatrends Driving Embedded Multicore Innovation

In her keynote presentation on Day-2 of the Design Automation Conference, Freescale Semiconductor's Lisa Su (Senior VP and General Manager for Networking and Multimedia) provided a comprehensive exposition of a major transition that is underway in the semiconductor industry, from what she described as a compute-centric world to a world of embedded processing. Her appearance (at her very first DAC),  the day after that of PC-era founder Steve Wozniak on Monday, foretold the evolution that she went on to describe in "Megatrends Driving Embedded Multicore Innovation".

The "Internet of Things"
Su began by describing how this embedded era, frequently described as  the "Internet of things", is about  everything else beyond general-purpose computing; a megatrend that includes applications for healthcare, safety, energy, transportation, communications,  entertainment, and cloud computing. This, she said, will take over the industry for the next 5 to10 years. There is a shift away from Wintel architectures to standards-based hardware and open-source software (such as Linux and Android). The number of connected devices will far exceed cell phone volumes today, and is projected to be in the tens of billions of devices in a variety of form factors, for a wide variety of vertical markets.

As Cisco has projected in their oft-cited VNI (visual networking index), mobile data traffic is doubling every year. Related to this is the evolution from 2G to 3G and now to 4G networks, which creates the need for more powerful embedded systems to manage network communications infrastructure, according to Su. Large cellular radio towers will not be the way of the future, as 4G networks will require a heterogeneous mix ranging from large metropolitan macro cells, to enterprise picocells, to small personal femto cells in order to provide the required coverage and capacity. (For more on this topic see DSPs Power the Race to 4G).

The automotive industry is another fertile ground for innovation, said Su,  from the management of power train functions and advanced braking systems that are becoming common today, to radar collision prevention systems that are currently in development. In a somewhat more futuristic vein, she described a vision of car-to-car connectivity, where vehicles will communicate with each other to reduce traffic congestion or for collision avoidance. Your car will be capable of sensing road conditions, and communicate with highway infrastructure for dynamic traffic re-routing. This creates a great opportunity for the growth of embedded systems, where micro-controllers will be combined with a large amount of analog circuitry and sensors. From a market perspective, she said, the world of embedded computing is a very diverse space. But, regardless of the application requirements for small or large SoCs, the design objectives are the same - increase performance while reducing cost and power.

The Shift to Multicore
Su went on to say that the development of multicore architectures has been the key innovation in the shift from the compute world to embedded, and it is still evolving. It is relatively easy to put multiple cores on a chip, she said, but the difficulty is how to get the performance out of the architecture - especially with the tradeoff between power and performance.

Embedded designers employ a variety of architectural options. (courtesy Freescale Semiconductor)
Freescale's designers are spending a tremendous amount of time on the software component of embedded designs, accounting for around 70% of multicore project cost.They are also challenged to analyze the architectural tradeoffs regarding which tasks should be handled by embedded processors versus what is better done with dedicated hardware accelerators or FPGAs. Depending on the application, designers may use any of the possible options -  from single core designs with hardware accelerators, to homogeneous multicore architectures connected over on-chip buses, to heterogenous multicore designs, where there is a lot of activity today. Su described heterogenous multicore as the "ultimate in system flexibility on a chip", where designers can combine a microprocessor with a  GPU (graphics processing unit), a DSP (digital signal processor) and other accelerators... all on the same chip where they must work together with integrated software.

Different Configurations for Different Markets
There is no "one size fits all" multicore architecture. In smartphones and tablets the next step is for quad-core designs (such as the ARM Cortex -A9). Su pointed out that high levels of integration are required for this market, where functions must include support for multiple cameras, embedded security, power management, image processing and high-definition graphics.

This can be compared to embedded processors for cloud networking, such as Freescale's QorIQ,  which will typically utilize multicore designs with 4, 8, or even 16 cores, Su said. In embedded network processors, there is a lot more aggressive use of communications accelerators, packet processors, network fabrics integrated on chip, and a lot of high-speed mixed-signal integration.

A third market for embedded processing is wireless infrastructure. According to Su, a cellular basestation needs a lot more signal processing, mixed with specialized accelerators. Each market drives the need for application-specific hardware accelerators to complement the multicore processors.

What do embedded multicore designers need from the EDA industry?
"There are a lot of good tools out there, but it still feels like the integration is our job. Integration would feel better if there was a more end-to-end solution."
  1. Integration. Su described how companies such as Freescale have migrated from being IDMs (integrated device manufacturers), with their own fabrication facilities, to their new role as fabless embedded systems providers. With manufacturing outsourced to foundries, "the stitching it together part is still our job" she said, and this is an area where Freescale would like someone else to do the job - as it is not where innovation and differentiation comes into the picture. This continues to be the missing link for EDA vendors who wish to move up the semiconductor food chain, since SoC integration is not their core competency. 
  2. Design for quality. Su projected that the use of multicore architectures will increase faster than Moore's Law, because embedded system customers demand a 4X increase in system performance with each new generation.  Very high levels of quality are expected, especially for auto systems that must work all the time, with zero failures. Design for quality must be part of the system design.
  3. Managing complexity. Design complexity is a major issue, as the semiconductor companies struggle to get working silicon on the first pass through manufacturing. Challenges that Su is seeing at 28nm include an increased need to design for reliability, and hardware-software codesign.  To maintain productivity of global design teams, they must be able to complete verification runs in no more than12 hours. 
  4. Power analysis. Su said that there is a "tremendous desire" by designers for help in power analysis.Dynamic power analysis needs improved tooling, for AC IR (current-resistance) power grid and decoupling capacitance requirements. "The analysis we do", she said, "is still fairly high level and fairly simplistic". She called on the EDA vendors for more innovation in this area, for development of better low power design techniques that are correlated with silicon. 
  5. Verification. Su also posed this challenge to the EDA audience: "How to get product out, from beginning of the design to production... in 12 months? Getting a lot more help in verification would help, she said. The single biggest thing designers ask for is more efficiency in running simulation cycles.  She presented the challenge to EDA vendors to accelerate simulation technology at the same rate that Freescale's customers demand from them... 4X with each generation. Transistor counts are currently increasing faster than EDA simulation tool speed, she said.
  6. Reliability and aging effects, as Intel well knows, are a major challenge. Manufacturers can no longer afford to "just margin it out" at 32 or 28nm. "We need to not over design", she said. 
  7. External IP. Looking at the growing trend for the use of externally-developed IP (now ~40% according to Freescale), Su said that as an SOC vendor Fresscale will focus on their core competencies; such as designing interconnect fabrics and proprietary accelerators. They prefer to buy industry standard interfaces, but IP vendors need to move to the next level  to make their offerings more complete, with the required APIs and drivers for an end-to-end solution. IP Providers can also help reduce SoC time-to-market pressures by providing verification and silicon validation compliance suites
  8. Software development is the single biggest challenge from an embedded system point-of-view. "We are not that good at it", Su said. The reason, she pointed out, is that there is a cultural difference between hardware and  software engineers, which results in non-optimized systems. At $100M for a 32nm SOC, the percentage cost for software is going up. Embedded manufacturers need to deliver the hardware and software at the same time, with integrated circuit boards available within days of first silicon. The challenges that Su pointed to, in terms of multicore, are both the nature and the sheer amount of software required. Designers also face difficulties in system partitioning and the programming model, which must support mixed operating systems and services with virtualization. Freescale often needs to to help their customers migrate from legacy embedded systems, and the customers don't want to re-write all their old code, so they expect tools to help migrate, with a programming model that is easy to understand. This is difficult when multiple accelerator blocks are part of the SOC architecture. The programming environment must be able to handle this simply, by providing a software abstraction layer for the hardware acceleration layers.
  9. Debuggers. The debug environment must provide visibility into all aspects of the embedded system, including into cores, accelerators, interconnect, and peripherals.
  10. HW/SW co-design. On this issue, Su asked "please help us". Software design now starts at the same time as the hardware. Virtual platforms provide some benefits; such as the ability to evaluate architectural tradeoffs, and design exploration, some early debug of new architectures, and highlighting of some performance bottlenecks Some application software development can be started on virtual platforms, she said. Cycle accurate simulation is needed to debug real world customer use cases, but this remains as the largest challenge. "Nirvana", in Su's words, is a system that always works, in the context of what their customers will see. Freescale finds that there are application spaces that can still only be developed on silicon, because simulation is not good enough to do all the hardware-software  boundaries well.
  11. Ecosystem. Su concluded by saying that the embedded design ecosystem must become much broader. Tools, she said, are only useful if they interoperate. In her experience, every EDA vendor wants to be their customer's end-to-end provider, but there is always somebody else out there who is better at something.  She concluded by calling for more EDA industry standards, especially to further support   interoperability for power analysis. The design automation community can accelerate innovation by scaling up (faster tools) and scaling out (richer eco-systems).

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