As many Electronic Design Automation (EDA) industry observers are well aware, pervasive commoditization and low valuations for the few public companies in the sector adds up to a generally unattractive space for Venture Capital (VC) investment. With low barriers to entry, would be EDA entrepreneurs are encouraged to bootstrap their companies, perhaps with small amounts of startup capital from angel investors. Multi-million dollar B and C-round investments are nearly extinct, as is the prospect of going public.
Against this backdrop, a $28M investment in an EDA startup is about as common as the appearance of Hailey's comet. Though not made public until now, such an investment did occur in 2011, when (following a series of transactions) state-owned China Electronics Corporation (CEC) sponsored the merger of Beijing-based Huada Empyrean Software (HES) with ICScape, the latter having been started in Santa Clara, CA in 2005.
China Electronics Corporation (CEC) is one of the key state-owned conglomerates directly under the administration of central government, and the largest state-owned IT company in China. It was established in 1989 and originated from the former Ministry of Electronics Industry as a result of government restructuring. (source: CEC Company Profile)
HES was formerly the internal CAD department of another CEC-owned company - Huada Electronic Design Co., Ltd. (HED), from which they inherited the Panda EDA system of Zeni analog/custom IC design tools. In their Company Profile, HED describes themselves as "a comprehensive integrated circuit enterprise which specialized on the IC design of smart cards and WLAN."
HED had attempted to export their proprietary CAD tools to the U.S. previously, as early as 2002, according to China's Ministry of Science and Technology Newsletter. The company was originally Beijing CLP Huada Electronic Design Co., Ltd., prior to being listed on the Hong Kong Stock Exchange, apparently as a means to transfer ownership to China Electronics Corporation Holdings Company Limited - a Hong Kong-based investment holding company.
China Electronics Corporation Holdings Company Limited is Hong Kong-based investment holding company.
The Company’s subsidiaries include Sangfei CEC Electronics Rus LLC, which is engaged in sales of mobile handsets; Sang Fei, which is engaged in manufacturing and sale of mobile handsets and other portable electronic products; Sangfei CEC Elektronik Ticaret Anonim Sirketi, which is engaged in sale of mobile handsets.
On September 09, 2009, the Company completed the acquisition of CEC Huada Electronic Design Co., Limited.(source: Chinese Stock Information, www.chinesestock.org)
In 2009, HED became a subsidiary of CEC Holdings and HES was established, then last year - merged with ICScape. Weiping Liu, formerly the CEO of HED, is now CEO and Chairman of the merged companies. Since Empyrean operates under the auspices of the China Integrated Circuit Design Group Co, and the State Development & Investment Corporation (SDIC), the combination of HES and ICScape is essentially a Chinese-owned EDA startup.
ICScape's founders started their company after leaving Sun Microsystems in 2004, with seed money from the Acorn Angels arm of Acorn Campus Ventures. Acorn has also invested in EDA startup Atoptech. ICScape President Steve Yang had a brief stint at Synopsys before he joined a former Sun Microsystems colleague, Jason Xing, who is now the company's VP of Engineering. According to Yang, ICScape currently has 10 employees in the U.S., with most of the total of 250 employees based in China. ICScape will make its U.S. debut at the 2012 Design Automation Conference (DAC) in San Francisco.
ICScape’s products focus primarily on clock tree analysis and timing closure. The company describes Timing Explorer as a Multi-Corner, Multi-Mode (MCMM) physically-aware timing ECO tool. ClockExplorer can automatically generate a clock tree schematic, perform multi-mode clock structure analysis, constraint checking and generation, and optimize clock topology to reduce latency. LibExplorer, as the name would imply, enables analysis of the timing characteristics in a cell library.
ICScape also offers Skipper, a chip finishing tool which can read in GDSII layout data, Open Artwork System Interchange Standard (OASIS) and Manufacturing Electron-Beam Exposure System (MEBES) formats. FlashLVL performs layout-to-layout comparisons.
The former HED tools which HES brings to the merger are focused on custom analog and mixed-signal design. These products include an OpenAccess-based schematic and layout editor - Aether, a parallel analog simulator Aeolus, a waveform analysis tool iWave, the Argus DRC and LVS tool, a post-layout debugger for DRC and LVS errors - PVE, and RCExplorer for parasitic extraction and analysis. Yang says that the Aeolus simulator is higher capacity than a regular SPICE simulator, with higher accuracy than a FastSPICE tool. He also offered that ICScape/HES has a Verilog simulator as well, though none is listed in the company's product portfolio, which can be used for mixed-signal simulation.
As to how ICScape will leverage the $28M investment from CEC, Yang first listed more R&D staffing as a priority, along with sales, marketing and applications engineers. The company is actively interviewing, and looking for larger office space in Santa Clara.
A comparison of ICScape/HES to EDA startup guidelines, provided by industry veterans Jim Hogan and Paul McLellan at the 2011 DAC, shows that the company is both more richly funded and much more heavily staffed than a model Series-C stage startup, albeit with staffing that is primarily in China. Of course, the standard investment criteria and ROI requirements of a U.S. VC can not be assumed to apply here. However, the challenges to success in the EDA industry do apply, and those challenges are not insignificant.
First of all, one must look at the track record of a company's management. With a CEO whose accomplishments are limited to a Chinese state-owned company, and nearly no EDA experience in the President and VP positions, ICScape/HES must bring in more EDA industry veterans in senior positions, if it is to have any chance to compete in the U.S.
Looking at the technology-related success characteristics provided by Hogan and McLellan also raises some issues, starting with "a differentiated technology that has a sustainable competitive advantage". The suite of custom analog design tools from HES are up against entrenched competitors, most formidably Cadence. While Springsoft/Laker has had success offering a lower-cost alternative to Virtuoso, Synopsys failed with their clone in Custom Designer. It is difficult to see what HES can offer to attract customers here.
Analog simulation is also a saturated market, and lacking foundry certification, ICScape/HES will be hard-pressed to make an inroads with Aeolus. Digital timing tools could offer an opportunity, if ICScape can backup their claims of having "reduced the number of iterations by at least 50% on each SOC design", and "reduced clock tree power by almost 40% in one multimedia chip using optimized clock constraints generated from ClockExplorer."
ICScape says that through the HES merger, their goal is to be a "critical global EDA player." Starting at DAC in San Francisco, it's showtime.