Monday, March 26, 2012

Texas Instruments adds to KeyStone product line with new TMS320C665x DSPs

The TMS320C6657 is a dual C66x core DSP, with an Acceleration Pac that includes
Viterbi and Turbo encoders for voice and radio communications applications.
(note: volume pricing information changed from original publication, per Texas Instruments 03/26/12)
Texas Instruments (TI) has added to their catalog of KeyStone architecture Digital Signal Processors (DSPs), with the introduction of three devices in the new TMS320C665x series. Tom Flanagan, Director of Technical Strategy for Multicore Processors at TI, says that the new DSPs fill out the first generation KeyStone 40nm product line, with an emphasis toward high-performance, low-power portable applications.

The top of the line TMS320C6657 integrates dual 1.25GHz C66x DSP cores, and is specified by TI for performance of up to 80 GMACs (billion multiply accumulate operations per second) and 40 GFLOPs (billion floating point operations per second). At a 1GHz clock rate, the nominal power consumption for the C6657 is 3.5W. For voice and radio communications applications, the C6657 incorporates an acceleration pac, with a Viterbi and a Turbo decoder. 

For lower power applications, the TMS320C6655 and C6654 provide single C66x cores, which TI rates at 40GMACs/20GLOPS (C6655), and 27.2GMACs/13.6 GLOPS (C6654). At a 1GHz clock rate, the C6655 consumes 2.5W, while the C6654 lowers power to 2W nominal, at 800MHz.

Peripheral and I/O support in the C6657/55/54 devices includes a Universal Parallel Port (UPP), which enables  direct connections to A/D or D/A converters, or to an FPGA.  The devices also provide two McBSP (Multichannel Buffered Serial Ports) ports, a PCI Express Gen II single and double lane interface, and Serial RapidIO V2.1 x4 ports (in the TMS320C6657/55 only). Other functions in the Peripheral I/O block, include EMIF 16 (External Memory Interface), a SGMII (Serial Gigabit Media Independent Interface‎) Ethernet port, dual UARTs (Universal asynchronous receiver/transmitter), I2C (Inter-IC) bus, SPI (Serial Peripheral Interface) bus, and GPIO (General Purpose Input/Output).

The TMS320C6657/55 also support a 1333 MHz (32b) DDR3 interface, and the TMS320C6654 supports 1066 MHz (32b) DDR3. TI's HyperLink bus on the C6657/55 enables chip-to-chip interconnect, and along with Multicore Navigator, enables the DSP to transparently dispatch tasks for execution on other local devices.

To minimize size and weight for portable applications, TI is packaging the TMS320C665x series in a 21mm x 21mm FC-BGA (Flip Chip Ball Grid Array), which is only 2.9mm in height. Flanagan says that TI is offering the devices with an extended low temperature option, guaranteeing performance down to -55C, which is well suited for mounting the DSPs on the skin of drone aircraft. Other application areas that TI is targeting with the C6657/55/54 include embedded vision applications, real-time industrial inspection, avionics, biometric scanners, portable medical diagnostic instruments, and intelligent video surveillance.

Pricing and Availability
TI says that pricing for the C6654 DSP starts at under $30 for 10,000 unit quantities, and they are taking orders now. The company is also offering low cost EVMs (evaluation modules) to help developers get started designing with the C6654, C6655 and C6657. The TMDSEVM6657 is $349, and the TMDSEVM6657LE sells for $549. Both EVMs include a free Multicore Software Development Kit along with TI’s Code Composer Studio IE (Integrated Development Environment).  The kits also include a suite of application/demo codes.

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