Thursday, February 2, 2012

DesignCon exhibitors showcase solutions for high-performance AMS design

The theme for the DesignCon tradeshow and conference is "where chipheads connect". It is unclear if the engineers in attendance identify with that moniker, but the preponderance of exhibitors with solutions for signal integrity problems does make the event a good place to find answers if you are having  problems getting your high-frequency interfaces to connect.

Texas Instruments introduced a line of 10 signal conditioner ICs, designed at the former National Semiconductor, for applications such as 10G/40G/100G Ethernet, 10G-KR (802.3ap), InfiniBand, Fibre Channel and the Common Public Radio Interface (CPRI). Sanjay Gajendra, Senior Product Manager for High Speed Interface at TI, described how the new signal conditioners can replace the Physical Interface (PHY) in ASICs for driving 10Gbps interfaces. The devices include on-chip eye-monitoring and pattern generation to ease debug, with built-in adaptive equalization to eliminate the need for  manual optimization. No external reference clock is needed, and the chips operate from a single voltage power supply with no heat sink. Technical details and videos are available on the TI website.

Xilinx rolled out a set of design kits, including one for DSP applications from Avnet, for the new 28nm Kintex and Virtex families of FPGAs. The Xilinx Agile Mixed Signal header is provided with all 7-Series kits, along with board design files, and a full seat of the Xilinx ISE Design Suite Logic Edition, locked to the on-board FPGA. Xilinx is also providing a set of reference designs in the Virtex-7 Evaluation Kit, including Gigabit and 10Gigabit Ethernet. Avnet's Kintex-7 DSP Kit includes a copy of MathWorks evaluation software for MATLAB and Simulink. A reference DSP design can be downloaded from Avnet.

National Instruments showed a demo for performing system-level mixed-signal design, linking the company's FPGA-based Compact Reconfigurable IO (CompactRIO) hardware and Multisim products. The graphical user interface (GUI) enables designers to easily configure digital blocks in the CompactRIO FPGAs, and interface directly to SPICE co-simulation of the analog components.

Analog/Mixed-Signal (AMS) design was also the topic of a DesignCon Panel discussion with the curious title "Is it time for an analog comeback". For more on that discussion, sign up here to receive the forthcoming issue of OpenSystems Media's Tech eBrief on Analog technology.

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