Tuesday, October 18, 2011

Altera develops FPGA-based video content analytics for surveillance applications

Altera has announced development of a high-definition video content analytics solution, incorporating intellectual property from Eutecus' Multi-Core Video Analytics Engine (MVE™),  on a Cyclone® IV FPGA.  The solution enables real-time video processing at 1080p, 30 frames/sec, according to Arun Iyengar, VP Military, Industrial, and Computer Division at Altera. The parallel processing in the Cyclone FPGA solution is capable of 60-Mpixel per second throughput, with pixel resolution that exceeds the capability of standard DSP-based approaches, he says. Eutecus estimates that to perform similar analytics, such as reading a license plate at 1024 X 1024 pixel resolution, would require a standard DSP chip to operate at a 7.3GHz clock rate.

Video content analytics differs from simple motion detection, says Ivengar, by executing complex algorithms that can check multiple user-defined rules in parallel. Since digital HD cameras produce much more data than the analog versions they are replacing, computation of the analytics in the camera, rather than in the cloud, conserves bandwidth and reduces latency over their internet protocol (IP) connections to host computers. Ivengar is seeing increasing demand for HD IP-connected surveillance cameras in Homeland Security type applications, and to provide more sophisticated traffic monitoring to detect accidents, stopped traffic and red-light violations, or identify vehicles moving in the wrong direction. 

The Altera video content analytics solution embeds Eutecus Multi-Core Video Analytics
Engine in a Cyclone® IV FPGA for in-camera HD video processing

Users can update the rules and configure surveillance alerts in the analytics engine remotely, over the ethernet connection to the camera. The in-camera processing can be used to monitor video automatically, eliminating the need for manual scanning of a recording or constant monitoring of a video display, says Ivengar. The Eutecus' MVE embedded in the FPGA executes the massively parallel algorithms by combining specialized coprocessors with multiple 32b RISC Nios II cores in the Cyclone IV. In a typical camera integration, the raw pixel processing from the image sensor is first performed by a separate FPGA or DSP, The Cyclone IV then performs the analytics, and the output can be encoded by a 2nd DSP or application specific standard product (ASSP) video codec for streaming over the ethernet connection.

Eutecus provides a software GUI for the MVE that enables designers to customize the rules and parameters for event-detection to a specific application. The Eutecus API can be used by customers to interface surveillance cameras to their own video management systems, or to develop their own custom user interface.

The Cyclone-IV video content analytics solution is being offered on a royalty-based model, with the intellectual property sold directly by  Altera, eliminating up-front non-recurring expense (NRE) charges. Altera will ship security devices along with the intellectual property, and the device must remain attached in order for the FPGA to continue functioning.

No comments: