Wednesday, August 17, 2011

Hot Chips will need more analog to support multicore

The 23rd annual Hot Chips conference got underway at Stanford University today, with a series of talks that were billed as a "tutorial" on Package-Scale Power Management.  In actuality, the talks were less tutorial and more of a review of the challenges, and current and (potential) future solutions for power management in heterogeneous multicore designs.  One common thread that ran through each of the presentations... integration of more complex and higher performance analog circuits is an absolute requirement. Digital needs analog more than ever.

  • In "Practical power gating and dynamic voltage/frequency scaling issues",  AMD fellow Stephen Kosonocky reviewed the tradeoffs that the company's engineers had to consider in the design of the Llano APU (accelerated processing unit). It was clear that, in optimizing their design, the AMD engineers performed a thorough analysis in considering all the potential issues, such as EM (electro-migration), surge currents, IR drop, etc.  Kosonocky showed that chip-package co-design is mandatory as the package constraints, due to the cost of adding power planes and routing congestion, limit how much designers can optimize and segregate power-performance across an SoC. The AMD presentation provided the setup for the talks that followed, showing that the ability to add more cores to an SoC will be limited by the degrees of freedom  engineers have to tune the voltage for various portions of a chip. This need drives the requirement for integrating voltage regulators on-chip.
  • In "Integrated Inductors with Magnetic Materials for On-Chip Power Conversion",  Don Gardner -  of Intel's Labs for Circuit Research and Future Technology, shared results of their work on adding magnetic materials to a standard CMOS process. Gardner showed detailed information on the work that he and his colleagues have conducted to build on-chip buck converters with coupled inductors. The high inductance density that is needed led to evaluation of materials such as CoZrTa (cobalt, zirconium, tantalum) and NiFe (nickel-iron) metallization. It was fascinating to see the analysis of "magnetic vias", analogous to conventional signal and power vias, but with the purpose of efficiently coupling flux in what is in essence an on-chip transformer with magnetic windings around a core.
  • The last presentation in the session was by Profesor Elad Alon, of UC Berkeley and the Berkeley Wireless Research Center. In "Fully Integrated Switched-Capacitor DC-DC Conversion", Alon described a somewhat more conventional approach, using capacitors rather than inductors, to build on-chip DC-DC converters. This could offer an advantage by not requiring addition of any high-cost processing steps in device fabrication. Intel was, understandably, not able to speak on the costs of adding magnetic materials to perform the same function. Anon also projected the use of switched capacitor voltage regulators in stacked-die 2.5D/3D configurations, where an older, lower-cost technology could be used to supply power distributed across the surface of a more advanced multi-core processor SoC.

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